LTC6802 based 12 cell slave.

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Re: LTC6802 based 12 cell slave.

Postby GregsGarage » Wed Aug 15, 2012 1:43 pm

I'm thinking that with a usb-ttl cable I can connect to the slaves with a laptop and send/receive data using a simple terminal program. This should help when I get to working out the pic to 6802 protocols.
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Re: LTC6802 based 12 cell slave.

Postby GregsGarage » Wed Aug 29, 2012 10:05 pm

Quick update, the new pcbs have arrived, :D should get the max232 chips soon. I've been working on some test software for the maximite as a master. For these boards I am going to use pbp, just paid for the 3.0 upgrade. I still think JalV2 is a possible canidate, but for sake of speed I am sticking with what I know, at least for now. I've also figured out how to decode and generate the CRC-8 packet error codes that the 6802 attaches to the end of any data it sends. The routine is very simple, just a few lines of code and a 256 byte lookup table, so I will look at including it in the master and slave bus communications. This should further help in making communications more reliable.
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Re: LTC6802 based 12 cell slave.

Postby GregsGarage » Fri Aug 31, 2012 10:49 pm

S**t, while fixing the ICSP traces I got the vss and vdd traces to the pic swapped. :evil: I've cut the traces and bodged them with some jumper wire, so that will do for testing. :shock: Hopefully 3rd time lucky on the boards. I'm making a list of other small fixes that need to be done as well.
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Re: LTC6802 based 12 cell slave.

Postby GregsGarage » Sun Sep 02, 2012 11:15 pm

Better news today, I've got my maximite sending commands to the slaves and they are returning data successfully! :D :D

The baud rate is 9600 and I have 2 slaves connected to the MM. Next step will be to get a couple of 5 meter usb cables and test them in my car. If that all goes well then I get to have fun soldering on the 6802 chips, get the spi bus working and see if I can get some real cell data. :shock:
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Re: LTC6802 based 12 cell slave.

Postby GregsGarage » Mon Sep 03, 2012 11:15 pm

I put the oscilloscope onto the master and slave bus, voltage levels are 10 volts peak to peak, about what I expected. So far so good with my modified RS232 bus. :D I also used the scope to fine tune the slave software. It needed a delay after sending the master data and before sending the slave out to the next slave. Only needed 2ms but without it there was a data collision. Must be a delay in the hardware UART that I am using for the master and slave in data that means master data is still being sent while the slave out command gets sent. :? I'll have to look at it some more with the logic analyser.

I then tried them sitting in my car, completely unaffected by any interference. 8) Of course they aren't actually connected to any cells, so I've fully built one board.
6802-A1.JPG
6802-A1.JPG (280.86 KiB) Viewed 6995 times


Next step, seeing if I can get the spi bus working and talking to the 6802. Should be fun. :shock:
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Re: LTC6802 based 12 cell slave.

Postby GregsGarage » Thu Sep 06, 2012 9:50 pm

Slowly making progress on the spi front. I am using the pbp shiftin and shift out commands which will give a baud rate of around 50khz, more than adequate for our needs. Main problem at the moment is that R17 and R18 values are too high, 4k7 at the moment. I need to lower this value to get the optos switching faster, but not too much that it overloads the 6802 which can only supply 4ma. I will start stacking smd resistors in parallel, a bit of trial and error, and see how it goes.
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Quick update on spi bus

Postby GregsGarage » Wed Sep 12, 2012 6:58 pm

Work on the SPI bus has been a bit trickier than expected. 2 problems. First is that I need to change the optos, I can't drive the current ones hard enough with the limited output available from the 6802, so I found some ultra low power optos from Avago designed just for this purpose, I hope. :shock:

Second problem is that optos normally invert any signal, so I needed to use an "inverted" spi mode on the 16f886. It turns out that there is a silicon bug in the 886 that prevents this mode from working as expected. :evil: There are work a rounds, so with the new optos I should be able to get some comms with the 6802.

I will be doing another pcb layout, so if anyone sees anything that should be changed, let me know. I want this to be the last revision if possible.
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Re: LTC6802 based 12 cell slave.

Postby GregsGarage » Fri Sep 14, 2012 11:32 pm

The new optos look like they are the buisness, I can send the clock signal through at 1Mhz which is the max data rate for the 6802. 8) U2 stays the same, it's just a chip select signal, so slow is o.k., 8) U3 gets replaced with a Avago ACPL-M61L and U4/5 get replaced with a single ACPL-064L. Bad news is that it looks like I've knackered the SDO on the 6802, so need to sort that to get data out of the 6802 and back to the pic. :(
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Re: LTC6802 based 12 cell slave.

Postby GregsGarage » Tue Sep 18, 2012 7:27 pm

Turns out the 6802 that I suspected a fault with is o.k. :D I found another error on the pcb, the 6802 has a pin labeled MMB. If it's pulled low it makes the chip act like the 6801, a simple cell voltage monitor. I should have tied it to the vref pin to pull it high but I left it floating, causing erratic behavior. I've now got quite a list of changes for the next pcb, 2 new optos, fix some layout errors and change the 16F886 to a 16F1825. This is a 14 pin pic, a bit cheaper and saves some board space. So now I've got most of the puzzle pieces, serial comms between master and slave(s), working spi comms to 6802 and crc lookup tables (error checking). Still a lot of work ahead putting the pieces together. :shock:

EDIT: I've got the 16F886 echoing cell voltage data from the 6802 onto the master bus. 8)
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Re: LTC6802 based 12 cell slave.

Postby retepsnikrep » Wed Sep 19, 2012 3:14 am

Lots of progress well done.
Regards Peter

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