retepsnikrep wrote:Well done Greg. I've looked at your schematic and seems OK.
A few comments.
I like the idea of J2 to supply power I suggest make that a 2 pin sil 0.1" so that you have a simple connector to push on it powered from 3xAA batteries. Or you could make J1 a 4 pin connector (the 4th pin to +ve) and just make up a special programming lead which incorporates the battery supply.
Will do the 4 pin connector.
You are proposing a multi connector at the battery box is that correct? My multi cell connector was going to be on the board.
Correct, I will have a harness coming from the slave with a multi conector to join a matching connector on the outside of a sealed battery box.
Imagine the board is ready to go and we plug in a multi cell connector if say the top and bottom pins make contact first how would that effect the board? Or imagine any other combination of pins does it make any difference and is it/could it be detrimental blow the board?
I don't think it will be a problem, R5 on each board should act as a voltage divider to protect individual boards until full connection is made, not sure how D1 in series will affect this though.
Remember when stacking the multicell slave boards the last + on the bottom board becomes the first negative on the next board up and needs a connector between the two or two wires from that/those terminals at the battery, one for the last + on bottom board and one for first - on next board up.
I can add pads if you wanted to connect this way, in my case I will have seperate battery boxes, so it would not be an issue
Need to try and design it so high current will not try to flow in these wires as well.
I will have 1 amp fuses on each cell connection including the first cells negative.
Finally I think 16 cells is a good number. Because the Master can cope with upto 256 slaves and that divides nicely into it.
I like 16 as well.
As aside I'm learning PicBasic Pro (A compiled much faster system) for my current project, and I may be able to port this knowledge over to make a non picaxe slave which would reduce the cost as we could buy naked chips. (Rick is already tinkering with this) This could be a year away for me though as my current project is pretty tough.
If we wanted to be able to program in situ with this we would need to include the ISCP pins for each slave. I'm not sure about those for the PIC12F683 (Picaxe 08M) or how they would fit in along side the slave schematic. ICSP may not be so much of a necessity as the current picaxe digital slave software I'm using has worked for over a year without any changes or issues. If it works in my Insight I reckon it will work anywhere!!!!
I did actually draw the schematic with a ICSP header as well as the picaxe header, refer to the datasheet for the circuit. Only one issue came up and that is the CLK pin connects to pin 6 of the picaxe, the one that is being used for vref. So D1 would limit any signals to 1.2 volts. I don't know if this is a problem, so I removed it. It could be a feature for the next version though.
EDIT 26/10/09: Cleaned up up the schematic in my previous post.